The present invention relates to analog circuits and, in particular, to analog circuits that quickly and accurately reach a desired state at startup.
Analog circuits such as, for example, reference circuits and regulators are often required to turn on very fast, e.g., within a few hundred nanoseconds. In addition, such circuits may also be required to converge to a particular state (e.g., an output reference voltage level) with a high level of accuracy within the very fast turn-on time. This is particularly important for systems in which different functional blocks may be selectively placed in low-power or standby modes for power management purposes. Such blocks must be able to “wake up” quickly to full power on demand without undesirably interrupting or delaying system operation.
One common technique for achieving a fast turn-on time involves the use of a clamp circuit to quickly charge a circuit node or network very close to a desired level. The drawback with this technique is that it may not provide the required level of accuracy for all applications due to variation in the devices used to implement the clamp circuit, e.g., variation in a diode voltage or the threshold voltage of a transistor.
Another common technique involves the temporary use of a high bias current at startup to increase the slew rate of the slower components of the circuit (e.g., operational amplifiers) connected to the target network or node. This approach can be highly accurate in that it uses the same circuit to generate the state for both the startup and steady-state conditions. However, high bias currents often result in instability for certain load conditions, and therefore present undesirably complex design issues.